1. Field of the Invention
The present invention relates to an image processing device, an image processing method, and an image forming apparatus, in particular to those preferably used for processing image data having a larger size.
2. Description of the Related Art
Conventionally known are printer apparatuses (page printers) that perform printing for each page. Furthermore, also conventionally known are color printers that perform color printing by using respective colors of cyan (C), magenta (M), yellow (Y), and black (K), for example.
Flow of processing in the printers with the conventional techniques is described schematically. For example, page description language (PDL) data created on a personal computer or the like is transferred to the printer through a predetermined interface such as a network and a cable. In the printer apparatus, a printer controller analyzes the transferred PDL data and crates intermediate language that can be executed by a drawing unit. The drawing unit analyzes the created intermediate language to generate image data. Then, the drawing unit performs gradation processing on the generated image data to obtain binary image data. The binary image data is written into a memory as pieces of band image data formed by dividing the image data of one page in the sub-scanning direction.
It is to be noted that the memory into which the band image data is written is referred to as a band memory. Furthermore, an operation of writing the generated image data into the memory is referred to as drawing. The drawing of an image is performed for each of the colors of C, M, Y, and K.
The printer controller encodes pieces of image data of the respective colors drawn in the band memory with a binary image compression algorithm such as a joint bi-level image expert group (JBIG), and writes the generated respective codes into a main memory. At the time of printing, the printer reads out the codes from the main memory and decodes them while delaying timings for the respective planes of C, M, Y, and K for each of them. Then, the printer transfers the pieces of decoded data to printer engines corresponding to the respective planes of C, M, Y, and K so as to perform printing.
The printer apparatuses such as the page printers are required to increase a print resolution and increase a printing speed. It is, however, difficult to achieve these requirements only by processing capability of a central processing unit (CPU) controlling operations of the printer.
For example, in a high-speed apparatus having a high printing speed of 60 page per minute (PPM), it is necessary to draw a color image with respective colors of red (R), green (G), and blue (B) for one page having an A4 size (≅8.27 inches×11.69 inches) at 600 dot per inch (dpi) or 1200 dpi for equal to or lower than 1 second. This requires the high-speed apparatus to make memory access at a higher speed when image processing is performed.
On the other hand, known is a technique of configuring an image processing unit including the above-mentioned drawing unit, an encoding unit that compresses and encodes image data drawn in a band memory, a decoding unit that decodes the codes read from the main memory so as to restore the image data, and an engine controller that controls a printer engine in one application specific integrated circuit (ASIC). By configuring the image processing unit, the encoding unit, the decoding unit and the engine controller in the one ASIC, the manufacturing cost can be reduced and the printer apparatus can be reduced in size.
The main memory configuring the band memory is incorporated in the ASIC. This enables the image processing unit to access the main memory without using a bus, thereby performing the image processing at a higher speed. For example, when the image processing is performed on the A4 size at the resolution of 600 dpi, the total number of pixels is 6800 pixels×4720 pixels. In this case, when one pixel has a data size of 32 bits, a memory capacity of approximately 128 MB is needed. It is difficult to incorporate the memory having such a large capacity in the ASIC generally. For this reason, the image processing unit accesses the main memory from the ASIC through the bus so as to perform the image processing, leading to lowering of the processing speed.
With the recent development of a semiconductor process, an operation speed of a dynamic random access memory (DRAM) that is used for the main memory is increased. With this, a transfer rate between a memory controller controlling access to the main memory and a central processing unit (CPU) is also increased. Furthermore, general-purpose CPUs incorporating the memory controller have been developed.
When the general-purpose CPU incorporating the memory controller is used as the CPU of the printer controller, it is considered that the ASIC including the image processing unit is connected to a standard bus of the general-purpose CPU. That is to say, the DRAM that is used as the main memory is connected to the standard bus and the image processing unit accesses the DRAM through the standard bus in accordance with control by the memory controller incorporated in the general-purpose CPU.
Japanese Patent Application Laid-open No. 2008-023959 discloses a technique capable of improving a printing speed by using a CPU having a relatively low processing speed by drawing multivalued RGB information of a printer in a band memory with an operation by software on the CPU and executing image processing with hardware. Japanese Patent No. 4833770 discloses a technique of providing a local memory in addition to a main memory, performing drawing processing with hardware, encoding drawing data, and transferring it through a bus. In addition, Japanese Patent Application Laid-open No. 2005-309865 discloses a technique of enhancing drawing performance by executing respective pieces of processing relating to drawing in parallel and performing pipe line processing having large parallelism in a drawing processing unit so as to improve a printing speed by using a CPU having a relatively low processing speed.
The method of accessing the main memory through the standard bus by using the general-purpose CPU incorporating the memory controller as the CPU of the printer controller has preferable efficiency when data is transferred in serial.
On the other hand, in the drawing processing, there is a possibility that random access occurs frequently in various pieces of processing included in the drawing processing. In this case, the memory is not accessed efficiently and it takes a lot of time to access the memory. This lowers the transfer rate of the bus and arises a risk that access to the main memory from another piece of hardware is inhibited. In particular, when the drawing processing is executed only by software processing on the CPU, many pieces of memory access are performed. It is necessary to use a CPU having a high processing speed, resulting in a problem that the apparatus is increased in cost.
A method of providing a memory dedicated for drawing on the ASIC is also considered. In this case, the dedicated memory is provided separately from the main memory, resulting in a problem that the apparatus is increased in cost.
In view of the above-mentioned circumstances, there is a need to enable generation of image data having a large size at a higher speed by a configuration with reduced cost.